1. Statement of the Technical Field
This document relates to micro-coaxial waveguides in Integrated Circuits (“ICs”) and Multi-Chip Modules (“MCMs”). More particularly, this document concerns micro-coaxial waveguides for mechanically compliant high-speed interconnects between substrates of differing thermal expansion coefficients.
2. Description of the Related Art
Photonic Systems on Chips (“SoCs”) consist of multiple die on a common substrate. Silicon is typically used for the common substrate material. Silicon has well known properties and an ability to integrate digital and analog circuitry. The SoC approach: reduces Size, Weight and Power (“SWaP”); improves performance by integrating multiple functions; reduces performance variability and cost in production with the use of lithographic manufacturing; and enables higher speeds/wider bandwidths for telecommunications and military systems.
High performance optical devices are typically formed of Lithium Niobate (e.g., LiNbO3) or an indium phosphide (e.g., InP) compound. Lithium Niobate devices possess a Thermal Coefficient of Expansion (“CTE”) that is much different from that of the common silicon substrate. Frequently, interposer layers are required between each Lithium Niobate device and the common silicon substrate. Wire bonds are also required, which flex to compensate for the mechanical dimensional changes over temperature and must be placed singly during manufacture. Interposer layers and wire bonds are well known in the art. Still, it should be understood that the interposer layers and wire bonds can detrimentally impact bandwidth and performance of the optical device.
Optical communication data rates are continually increasing, requiring new devices and structures to provide the modulation/demodulation functions. Electronic Warfare (“EW”) and Signals Intelligence (“SIGINT”) markets desire the ability to observe and monitor all bands simultaneously in order to detect and deal with threats to the warfighter. The highest performance optical devices used in EW and telecommunications are looking for >100 GHz bandwidth. The bandwidth requirements of these optical devices will only increase over time.
Presently, preferred high speed interfaces to photonic devices in Photonic Integrated Circuits (“PICs”) are Co-Planar Waveguides (“CPW”) with ribbon bonds, geometry controlled wire-bonds, or 3D coaxial structures built around wire-bonds. Parasitics limit bandwidth and require the devices to account for these parasitics in the design stage (which is not always possible). Also, the cost of fabricating such interfaces is relatively expensive and slow as a consequence of having to create many individual wire bonds.